Codasip

Codasip develops custom compute solutions based on the RISC-V instruction set architecture. The company combines the open RISC-V ISA with its Codasip Studio design automation environment and a portfolio of processor IP, aiming to give developers workload-tailored processors rather than fixed, off-the-shelf cores. Its stated objective is to help customers differentiate their products through processor customization.

Codasip Studio supports processor design at several levels of effort: configuring cores from a set of pre-verified options, creating custom instructions within defined bounds, or designing a processor from scratch. The tooling covers both microarchitecture and instruction-set customization and is intended to carry designs toward production readiness. Alongside it, Codasip supplies pre-verified RISC-V processor IP cores ranging from low-power embedded designs to application-class processors.

Technical work spans processor design, verification and IP development, microarchitecture customization, custom instruction extension, power-performance-area optimisation, and CHERI-based memory protection. The company also addresses functional safety under ISO 26262 and cybersecurity engineering under ISO/SAE 21434, reflecting its activity in automotive and other safety- and security-conscious markets. Engineering practice is described as verification-driven, with quality maintained through defined bounds on customization.

Codasip works across embedded systems, automotive, and application-class or high-performance processing. Its presence is described as European and global. Further information is available at codasip.com.